ET4104 - VLSI Design and Reconfigurable Architecture (Syllabus) 2021-regulation Anna University

ET4104 - VLSI Design and Reconfigurable Architecture (Syllabus) 2021-regulation Anna University

ET4104 VLSI DESIGN AND RECONFIGURABLE ARCHITECTURE  LTPC
3003

OBJECTIVES:
• To expose the students to the fundamentals of sequential system design, synchronous and Asynchronous circuits.
• To understand the basic concepts of CMOS and to introduce the IC fabrication methods
• To introduce the Reconfigurable Processor technologies, To provide an insight and architecture significance of SOC.
• To introduce the basics of analog VLSI design and its importance.
• To learn about the programming of Programmable device using Hardware description Language.

UNIT I INTRODUCTION TO ADVANCED DIGITAL SYSTEM DESIGN 9
Modeling of Clocked Synchronous Sequential Network(CSSN), Design of CSSN, Design of Asynchronous Sequential Circuits (ASC), Designing Vending Machine Controller, Races in ASC, Static and Dynamic Hazards, Essential Hazards, Designing Hazard free circuits.

UNIT II CMOS BASICS & IC FABRICATION 9
Moore’s Law-MOSFET Scaling - MOS Transistor Model-Determination of pull up / pull down ratios- CMOS based combinational logic & sequential design- Dynamic CMOS –Transmission Gates- BiCMOS- Low power VLSI – CMOS IC Fabrications - Stick Diagrams, Design Rules and Layout.


UNIT III ASIC AND RECONFIGURABLE PROCESSOR AND SoC DESIGN 9
Introduction to ASIC, ASIC design flow- programmable ASICs- Introduction to reconfigurable processor- Architecture -Reconfigurable Computing, SoC Overview, recent trends in Reconfigurable Processor & SoC, Reconfigurable processor based DC motor control.

UNIT IV ANALOG VLSI DESIGN 9
Introduction to analog VLSI- Design of CMOS 2stage-3 stage Op-Amp –High Speed and High frequency op-amps-Super MOS- Analog primitive cells- Introduction to FPAA.

UNIT V HDL PROGRAMMING 9
Overview of digital design with VHDL, structural, data flow and behavioural modeling concepts- logic synthesis-simulation-Design examples, Ripple carry Adders, Carry Look ahead adders, Multiplier, ALU, Shift Registers, Test Bench.

TOTAL : 45 PERIODS

OUTCOMES:
CO1: incorporating synchronous and asynchronous switching logics, with clocked circuits design
CO2: The learning process delivers insight into developing CMOS design techniques and IC fabrication methods.
CO3: Understand the need of reconfigurable computing, hardware-software co design and operation of SoC processor.
CO4: Design and development of reprogrammable analog devices and its usage for Embedded applications.
CO5: Understating and usage of HDL computational processes with improved design strategies.

REFERENCES:
1. Donald G. Givone, “Digital principles and Design”, Tata McGraw Hill 2002.
2. Charles H. Roth Jr., “Fundamentals of Logic design”, Thomson Learning, 2004.
3. Nurmi, Jari (Ed.) "Processor Design System-On-Chip Computing for ASICs and FPGAs" Springer, 2007.
4. Joao Cardoso, Michael Hübner, "Reconfigurable Computing: From FPGAs to Hardware/Software Codesign" Springer, 2011.
5. Pierre-Emmanuel Gaillardon, Reconfigurable Logic: Architecture, Tools, and Applications, 1st Edition, CRC Press , 2015
6. Mohamed Ismail ,Terri Fiez, “Analog VLSI Signal and information Processing”, McGraw Hill International Editions,1994.
7. William J. Dally / Curtis Harting / Tor M. Aamodt,” Digital Design Using VHDL:A Systems Approach, Cambridge Univerity Press,2015.
8. Zainalatsedin Navabi, ‘VHDL Analysis and Modelling of Digital Systems’, 2n Edition, Tata McGraw Hill, 1998.

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