EE3302 Syllabus - Digital Logic Circuits - 2021 Regulation Anna University

EE3302 Syllabus - Digital Logic Circuits - 2021 Regulation Anna University

EE3302

DIGITAL LOGIC CIRCUITS

 LTPC

3003

COURSE OBJECTIVES:
• To introduce the fundamentals of combinational and sequential digital circuits.
• To study various number systems and to simplify the mathematical expressions using Boolean functions word problems.
• To study implementation of combinational circuits using Gates` and MSI Devices..
• To study the design of various synchronous and asynchronous circuits.
• To introduce digital simulation techniques for development of application oriented logic circuit.

UNIT I

NUMBER SYSTEMS AND DIGITAL LOGIC FAMILIES

9

Number system, error detection, corrections & codes conversions, Boolean algebra: De-Morgan’s theorem, switching functions and minimization using K-maps & Quine McCluskey method - Digital Logic Families -comparison of RTL, DTL, TTL, ECL and MOS families - operation, characteristics of digital logic family.

UNIT II

COMBINATIONAL CIRCUITS

9

Combinational logic - representation of logic functions-SOP and POS forms, K-map representations - minimization using K maps - simplification and implementation of combinational logic – multiplexers and de multiplexers - code converters, adders, subtractors, Encoders and Decoders.


UNIT III

SYNCHRONOUS SEQUENTIAL CIRCUITS

9

Sequential logic- SR, JK, D and T flip flops - level triggering and edge triggering - counters - asynchronous and synchronous type - Modulo counters - Shift registers - design of synchronous sequential circuits – Moore and Mealy models- Counters, state diagram; state reduction; state assignment.

UNIT IV

ASYNCHRONOUS SEQUENTIAL CIRCUITS AND PROGRAMMABILITY LOGIC DEVICES

9

Asynchronous sequential logic Circuits-Transition stability, flow stability-race conditions, hazards &amo; errors in digital circuits; analysis of asynchronous sequential logic circuits-introduction to Programmability Logic Devices: PROM – PLA –PAL, CPLD-FPGA.

UNIT V

VHDL

9

RTL Design – combinational logic – Sequential circuit – Operators – Introduction to Packages – Subprograms – Test bench. (Simulation /Tutorial Examples: adders, counters, flip flops, Multiplexers & De multiplexers).

TOTAL : 45 PERIODS

COURSE OUTCOMES: Upon the successful completion of the course, students will be able to:
CO1: Explain various number systems and characteristics of digital logic families
CO2: Apply K-maps and Quine McCluskey methods to simplify the given Boolean expressions
CO3: Explain the implementation of combinational circuit such as multiplexers and de multiplexers - code converters, adders, subtractors, Encoders and Decoders
CO4: Design various synchronous and asynchronous circuits using Flip Flops
CO5: Explain asynchronous sequential circuits and programmable logic devices CO6: Use VHDL for simulating and testing RTL, combinatorial and sequential circuits

TEXT BOOKS:
1. Morris Mano.M, ’Digital Logic and Computer Design’, Prentice Hall of India, 3rdEdition, 2005.
2. Donald D.Givone, ‘Digital Principles and Design’, Tata McGraw Hill,1st Edition, 2003
3. Thomas L Floyd, ‘Digital fundamentals’, Pearson Education Limited, 11th Edition, 2018

REFERENCES:
1. Tocci R.J., Neal S. Widmer, ‘Digital Systems: Principles and Applications’, Pearson Education Asia, 12th Edition, 2017.
2. Donald P Leach, Albert Paul Malvino, Goutam Sha, ‘Digital Principles and Applications’, Tata McGraw Hill, 7th Edition, 2010.

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