EC3352 Syllabus - Digital Systems Design - 2021 Regulation Anna University

EC3352 Syllabus - Digital Systems Design - 2021 Regulation Anna University

EC3352	DIGITAL SYSTEMS DESIGN	LTPC

3024

OBJECTIVES:

• To present the fundamentals of digital circuits and simplification methods.
• To practice the design of various combinational digital circuits using logic gates.
• To bring out the analysis and design procedures for synchronous and asynchronous Sequential circuits.
• To learn integrated circuit families.
• To introduce semiconductor memories and related technology.

UNIT I	BASIC CONCEPTS	9

Review of number systems-representation-conversions, Review of Boolean algebra- theorems, sum of product and product of sum simplification, canonical forms min term and max term, Simplification of Boolean expressions-Karnaugh map, completely and incompletely specified functions, Implementation of Boolean expressions using universal gates ,Tabulation methods.

UNIT II	COMBINATIONAL LOGIC CIRCUITS	9

Problem formulation and design of combinational circuits - Code-Converters, Half and Full Adders, Binary Parallel Adder – Carry look ahead Adder, BCD Adder, Magnitude Comparator, Decoder, Encoder, Priority Encoder, Mux/Demux, Case study: Digital trans-receiver / 8 bit Arithmetic and logic unit, Parity Generator/Checker, Seven Segment display decoder

UNIT III	SYNCHRONOUS SEQUENTIAL CIRCUITS	9

Latches, Flip flops – SR, JK, T, D, Master/Slave FF, Triggering of FF, Analysis and design of clocked sequential circuits – Design - Moore/Mealy models, state minimization, state assignment,lock - out condition circuit implementation - Counters, Ripple Counters, Ring Counters, Shift registers, Universal Shift Register. Model Development: Designing of rolling display/real time clock

UNIT IV	ASYNCHRONOUS SEQUENTIAL CIRCUITS	9

Stable and Unstable states, output specifications, cycles and races, state reduction, race free assignments, Hazards, Essential Hazards, Fundamental and Pulse mode sequential circuits, Design of Hazard free circuits.

UNIT V	LOGIC FAMILIES AND PROGRAMMABLE LOGIC DEVICES	9

Logic families- Propagation Delay, Fan - In and Fan - Out - Noise Margin - RTL ,TTL,ECL, CMOS - Comparison of Logic families - Implementation of combinational logic/sequential logic design using standard ICs, PROM, PLA and PAL, basic memory, static ROM,PROM,EPROM,EEPROM EAPROM.

45 PERIODS

OUTCOMES: At the end of the course the students will be able to

CO1: Use Boolean algebra and simplification procedures relevant to digital logic.
CO2: Design various combinational digital circuits using logic gates.
CO3: Analyse and design synchronous sequential circuits.
CO4: Analyse and design asynchronous sequential circuits.
CO5: Build logic gates and use programmable devices.

TEXT BOOKS:

1. M. Morris Mano and Michael D. Ciletti, ‘Digital Design’, Pearson, 5th Edition, 2013.(Unit - I - V)

REFERENCES:

1. Charles H. Roth, Jr, ‘Fundamentals of Logic Design’, Jaico Books, 4th Edition, 2002.
2. William I. Fletcher, "An Engineering Approach to Digital Design", Prentice- Hall of India, 1980.
3. Floyd T.L., "Digital Fundamentals", Charles E. Merril publishing company,1982.
4. John. F. Wakerly, "Digital Design Principles and Practices", Pearson Education, 4 th Edition,2007.